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Electronics Catlog
DIC Catlog

Number System
Conversions Between Number System
Arithematic Operations
1's & 2's Complement
Gray Codes
Arithmetic Circuits
Logical Gates and Truth Table Funtions
Boolean Expressions
Boolean Algebra
Karnaugh Map
Encoder & Decoder
TTL Circuits
555 Timer
Flip Flops
RS Flip - Flop
JK Flip - Flop
D Flip - Flop
Shift Register
Schmitt Trigger
Asynchronous Counters
Synchronous Counters
Digital - Analog Conversion
Data Flow
Memory Drives
Electronics Equation
Resistor Color Codes


    "Flip-flop" is the common name given to two-state devices which offer basic memory for sequential logic operations. Flip-flops are heavily used for digital data storage and transfer and are commonly used in banks called "registers" for the storage of binary numerical data.

flip flop

Edge Triggering

    Edge triggering is when the flip-flop state is changed as the rising or falling edge of a clock signal passes through a threshold voltage. This true dynamic clock input is insensitive to the slope or time spent in the high or low state.

Edge Triggering

    Figure: A slow or delayed gate can be used to convert a level change into a short pulse. Both types of dynamic triggering are represented on a schematic diagram by a special symbol near the clock input. In addition to the clock and data inputs most IC flip-flop packages will also include set and reset (or mark and erase) inputs. The additional inputs allow the flip-flop to be preset to an initial state without using the clocked logic inputs.

Dynamic Triggering

    Figure: The schematic symbols for
a) a positive edge-triggered JKFF,
b) a negative (falling) edge-triggered JKFF and
c) a negative edge-triggered JKFF with set and reset inputs.